Home03 · The Chip LabInside the Fab
FAB · ATMP · OSAT
Front end, back end, and the wafer that travels between them.
A FAB makes the circuits on the wafer. An ATMP/OSAT turns those wafers into tested, packaged chips. I have worked in both, from wafer probe at Infineon and ASE to a 300 mm CVD module at Micron, and I led the DPR for the proposed HCL–Foxconn ATMP/OSAT facility. Start with the wafer's own journey.
Interactive module 01 · the wafer journey
Fourteen steps from sand to a chip in a box.
Press play or click a step. The wafer on the left changes with every stage; the panel on the right tells you what happens, which tools you would touch, what you learn by doing, and where I did it myself.
Step 01 · Front end
Silicon ingot & wafer slicing
Electronic-grade polysilicon is melted and pulled into a single-crystal ingot. The ingot is ground, sliced by wire saw into wafers, lapped, edge-rounded and polished to a mirror finish flat to within fractions of a micron.
Step 02 · Front end
Wafer start: clean & inspect
Incoming wafers are cleaned (RCA-type wet chemistry), inspected for particles and defects, and logged into the MES as a lot. From here every wafer has a history.
Step 03 · Front end
Thermal oxidation & diffusion
Wafers are heated in furnaces to grow silicon dioxide, an insulating layer, or to drive dopants. Temperature uniformity and thermal budget decide whether every wafer in a 25-wafer batch matches.
Step 04 · Front end
Photolithography
Photoresist is spin-coated, the wafer is exposed through a reticle in a stepper or scanner, then developed. The pattern for one layer of the circuit now exists in resist, ready to be transferred.
Step 05 · Front end
Etch
Plasma (dry) or wet etch removes material where the resist has been opened, transferring the pattern into the film below. Selectivity, profile and endpoint detection are the craft.
Step 06 · Front end
Deposition: CVD, PVD, ALD
Thin films of dielectric or metal are laid down: chemical vapour deposition from gases and plasma, physical vapour deposition by sputtering, atomic layer deposition one monolayer at a time. Litho, etch and deposition repeat dozens of times to build the device.
Step 07 · Front end
Ion implantation & anneal
Dopant ions are accelerated into the wafer to define transistors' electrical properties, then annealed to repair the crystal and activate the dopant. High voltage, toxic gases and precision dose control in one tool.
Step 08 · Front end
Chemical mechanical planarisation
After each deposition the surface is polished flat with slurry and a rotating pad, so the next lithography layer has a planar surface to focus on. Removal rate, dishing and erosion are the daily numbers.
Step 09 · Front end
Metrology & inspection
Between steps, wafers are measured: film thickness, critical dimensions, overlay, defects. Results feed SPC charts and FDC limits. Nothing is assumed; everything is measured.
Step 10 · The bridge
Wafer test (probe / sort)
A probe card touches every die's pads while automatic test equipment runs the test programme. The result is a wafer map: good dies and failing dies, and the yield number that tells the fab how it performed.
Step 11 · Back end (ATMP / OSAT)
Back-grind & dicing
The wafer is thinned from the back, mounted on tape and cut into individual dies with a dicing saw or laser. Kerf width, chipping and die strength are the quality measures.
Step 12 · Back end (ATMP / OSAT)
Assembly & packaging
Each good die is attached to a substrate or lead frame, connected by wire bond or flip-chip bumps, encapsulated in mould compound, and finished with balls or leads. The "A" in ATMP.
Step 13 · Back end (ATMP / OSAT)
Final test & burn-in
Packaged devices are loaded by handlers into test sockets and run through the final test programme, often after burn-in at elevated temperature to weed out early failures. The "T" in ATMP.
Step 14 · Back end (ATMP / OSAT)
Mark, pack & ship
Devices are laser-marked with part number and lot code, packed in tape-and-reel or trays, and shipped with full traceability back to the wafer. The "M" and "P" in ATMP. The chip is now a product.
Interactive module 02 · the layered chip
Peel a chip apart.
The black rectangle soldered to your phone's board is five things stacked on top of each other. Strip them away one at a time, from the armour down to the atoms.
Tip: you can also click the top layer in the stack.
Two halves of one industry
FAB and ATMP/OSAT: same wafer, different buildings, different economics.
India's semiconductor strategy needs both. The FAB is the capital-intensive front end; the ATMP/OSAT is the labour- and precision-intensive back end that turns wafers into products, and it is often the faster first step for a new ecosystem.
FAB
Cleanroom ISO 5 or better, thousands of process steps, tools costing tens of millions each, and utilities that behave like a chemical plant. Capex-heavy, years to ramp, decades to pay back.
ATMP / OSAT
ISO 7/8 cleanrooms, assembly and test lines, precision handling and reliability qualification. Lower capex per unit, faster to build, and where India can build scale and skills first.
What they share
Tool installation, hookup, qualification and sustaining discipline. Equipment engineering. Trained shifts. Supply chain for spares and consumables. The execution layer is common to both.
Six fab startups, one pattern
How a fab actually starts.
The phases every startup goes through, and where the projects I have been part of tended to slip.
- DPR, site and shell
Technology, capacity, tool list, utilities, headcount, capex and approvals in a Detailed Project Report; then land, structure and the base building. The mistakes made here are the most expensive to fix later.
- Cleanroom, MEP and utilities
Fan-filter ceilings, raised floors, subfab, UPW, bulk gases, chemicals, exhaust and power. Certified to class before a single tool arrives. EPCM/PMCM discipline lives or dies in this phase.
- Tool move-in and hookup
The calendar of rigging windows, points of connection and hookup crews. At Micron Fab10 my module alone had 100+ tools to install and connect. The whole fab has thousands of hookups.
- Qualification: SAT, LAT, release
Every tool proves itself against its factory baseline and then against a golden process. Then the module owner signs the release to production. No shortcuts survive the first yield review.
- Pilot line and integration
First full-flow lots. Every tool works; does the line? Cycle time, WIP, AMHS routing and the MES get their first real test, and so does the shift organisation.
- Ramp to volume
Uptime above 95%, PM schedules, spares, FDC/SPC live, and a trained bench that grows with the ramp. The startup team becomes the sustaining team, and the fab becomes a business.
India's opportunity
ATMP/OSAT first, fabs alongside, execution throughout.
India's incentive programmes have brought fab and ATMP/OSAT projects to the table. The back end offers the faster path to skills, employment and supply-chain depth; the front end anchors the long-term industry. Both need the same execution layer, and that is where I work.